FMOODS & FORTE
On Global Types and Multi-Party Sessions
June 6th - FMOODS/FORTE
We present a new, streamlined language of global types equipped with a trace-based semantics and whose features and restrictions are semantically justified. The multi-party sessions obtained projecting our global types enjoy a liveness property in addition to the traditional progress and are shown to be sound and complete with respect to the set of traces of the originating global type. Our notion of completeness is less demanding than the classical ones, allowing a multi-party session to leave out redundant traces from an underspecified global type.
Giuseppe Castagna (Beppe)
Giuseppe Castagna is a senior researcher at CNRS. After twelve years at the Computer Science Department of École Normale Supériere in Paris where he led the Programming Languages group, in 2006 he moved to the PPS laboratory of University of Paris 7. His research interests span over programming languages for XML and Web applications, type theory, and concurrency theory
Resisting Intrusions means more than Byzantine Fault Tolerance
June 7th - DAIS
Byzantine Fault/Intrusion Tolerance has become a reference paradigm for dealing with faults and intrusions, achieving security (and dependability) in an automatic way, much along the lines of classical fault tolerance. However, the explosive combination of the desired asynchrony of these systems with the real-life (and real-time) power of attackers, brings about limitations of the paradigm as a basis for designing resilient systems, some of which quite unexpected. We wish to discuss the limitations of some theoretical underpinnings of Byzantine Fault/Intrusion Tolerance in distributed systems, and report on some research results evaluating and mending some of those limitations.
Paulo Veríssimo is currently a professor of the Department of Informatics (DI) of the University of Lisboa Faculty of Sciences (http://www.di.fc.ul.pt/~pjv), and Director of LASIGE, a research laboratory of the DI (http://lasige.di.fc.ul.pt). He is Fellow of the IEEE and Fellow of the ACM. He is associate editor of the Elsevier Int’l Journal on Critical Infrastructure Protection, and past associate editor of the IEEE Tacs. on Dependable and Secure Computing. He belonged to the European Security & Dependability Advisory Board. He is past Chair of the IEEE Technical Committee on Fault Tolerant Computing and of the Steering Committee of the DSN conference, and belonged to the Executive Board of the CaberNet European Network of Excellence. He was coordinator of the CORTEX IST/FET project (http://cortex.di.fc.ul.pt). Paulo Veríssimo leads the Navigators research group of LASIGE, and is currently interested in: architecture, middleware and protocols for distributed, pervasive and embedded systems, in the facets of real-time adaptability and fault/intrusion tolerance. He is author of more than 150 refereed publications in international scientific conferences and journals in the area, and co-author of five books (ex. http://www.navigators.di.fc.ul.pt/dssa/).
Extreme Coordination - Challenges and Opportunities from Exascale Computing
June 8th - COORDINATION
In this talk, I will discuss the relationship between exascale computing and coordination models. At the ExaScience Lab in Belgium, we are currently working on space weather simulation as a driving application, which is a typical example for a high-performance computing application that will require exascale computing power. Space weather simulation is based on numerical algorithms which are traditionally relatively easy to parallelize, and their coordination effort is quite low such that using dedicated, advanced coordination models are typically not considered. However, exascale computing will pose a number of serious new challenges that need to be addressed, and for which good solutions are not known yet. The major problems are: energy consumption, hardware heterogeneity, performance variability of hardware over space and time, and high hardware failure rates. Addressing them all at the same time turns even simple computations into complex problems. I will zoom in on hardware variability and failures as particularly challenging issues: I will discuss tuple spaces as an example of an approach that can help with hardware variability, but needs adaptation to also deal with hardware failures.
Pascal Costanza obtained a Ph.D. degree from the University of Bonn, Germany. After a post-doc period as a research assistant at the Vrije Universiteit Brussel, Belgium, he now works for Intel at the ExaScience Lab at IMEC in Leuven, Belgium. His current work focuses on dynamic scheduling strategies for high-performance computing that support data locality and resilience. In the past, he worked on programming language and runtime system extensions to support various metaprogramming techniques, including macro systems, aspect-oriented programming, and context-oriented programming.